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? motorola, inc., 2003 AN2533/d rev. 0, 5/2003 standard space vector modulation ? 3 outputs version ? xor version tpu function set (svmstd3xor) application note by milan brejl, ph.d. functional overview standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor) is a version of the standard space vector modulation ? 3 output version (svmstd3) function that uses two tpu channels to generate one pwm output channel. the tpu channel outputs are connected to an xor gate whos output is the required pwm signal. see figure 1 . an advantage of this solution is the full range 0% to 100% of pwm duty-cycle ratios. there is no mpw (minimum pulse width) parameter to limit the edge duty-cycle ratios in this version, unlike in the svmstd3. a disadvantage is that the number of assigned tpu channels is doubled. figure 1. functionality of xor version ? illustration the function set consists of 5 tpu functions: standard space vector modulation ? 3 outputs version ? xor version ? r channels (svmstd3xor_r) standard space vector modulation ? 3 outputs version ? xor version ? t channels (svmstd3xor_t) a 1 xor xor a 2 b 1 xor xor b 2 c 1 xor xor c 2 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 2 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola synchronization signal for standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor_sync) resolver reference signal for standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor_res) fault input for standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor_fault) the svmstd3xor function generates 3 pairs of xor gate input signals. the xor gate outputs then produce a 3-channel 3-phase center-aligned pwm signal. the generated signals control external hardware, which outputs pair of transistor signals (top and bottom) with dead-time inserted. the synchronization signal for the svmstd3xor function can be used to generate one or more adjustable signals for a wide range of uses, that are synchronized to the pwm, and track changes in the pwm period. the resolver reference signal for the svmstd3xor function can be used to generate one or more 50% duty-cycle adjustable signals that are also synchronized to the pwm. the fault input for the svmstd3xor function is a tpu input function that sets all xor gate outputs low when the input signal goes low. function set configuration none of the tpu functions in the standard space vector modulation ? 3 outputs version ? xor version tpu function set can be used separately. the svmstd3xor_r and svmstd3xor_t functions have to be used together. the svmstd3xor_r runs on pins a1, b1, c1, and the svmstd3xor_t runs on pins a2, b2, c2 ? see figure 1 . one or more channels running synchronization signal for svmstd3xor as well as resolver reference signals for svmstd3xor functions can be added to the svmstd3xor_r and svmstd3xor_t functions. they can run with different settings on each channel. the function fault input for svmstd3xor can also be added to the svmstd3xor_r and svmstd3xor_t functions. it is recommended to use it on channel 15, and to set the hardware option that disables all tpu output pins when the channel 15 input signal is low (dtpu bit = 1). this ensures that the hardware reacts quickly to a pin fault state. note that it is not only the svmstd3xor_r and svmstd3xor_t channels, but all tpu output channels, including the synchronization signals, that are disabled in this configuration. table 1 shows the configuration options and restrictions. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d function set configuration motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 3 table 2 shows an example of configuration. table 3 shows the tpu function code sizes. configuration order the cpu configures the tpu as follows. 1. disables the channels by clearing the two channel priority bits on each channel used (not necessary after reset). 2. selects the channel functions on all used channels by writing the function numbers to the channel function select bits. table 1. svmstd3xor tpu function set configuration options and restrictions tpu function optional/ mandatory how many channels assignable channels svmstd3xor_r mandatory 3 any 3 channels svmstd3xor_t mandatory 3 any 3 channels svmstd3xor_sync optional 1 or more any channels svmstd3xor_res optional 1 or more any channels svmstd3xor_fault optional 1 any, recommended is 15 and dtpu bit set table 2. example of configuration channel tpu function priority 0 svmstd3xor_r middle 1 svmstd3xor_t middle 2 svmstd3xor_r middle 3 svmstd3xor_t middle 4 svmstd3xor_r middle 5 svmstd3xor_t middle 13 svmstd3xor_sync low 14 svmstd3xor_res low 15 svmstd3xor_fault high table 3. tpu function code sizes. tpu function code size svmstd3xor_r 216 instructions + 8 entries = 224 long words svmstd3xor_t 3 instructions + 8 entries = 11 long words svmstd3xor_sync 26 instructions + 8 entries = 34 long words svmstd3xor_res 38 instructions + 8 entries = 46 long words svmstd3xor_fault 9 instructions + 8 entries = 17 long words f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 4 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola 3. initializes function parameters. the parameters t , prescaler , sqrt3 , cpu14 and sync_presc_addr must be set before initialization. if an svmstd3xor_sync channel or an svmstd3xor_res channel is used, then its parameters must also be set before initialization. 4. issues an hsr (host service request) type %10 to one of the svmstd3xor_r channels to initialize all svmstd3xor_r and svmstd3xor_t channels. issues an hsr type %10 to the svmstd3xor_sync channels, svmstd3xor_res channels and svmstd3xor_fault channel, if used. 5. enables servicing by assigning high, middle or low priority to the channel priority bits. all svmstd3xor_r and svmstd3xor_t channels must be assigned the same priority to ensure correct operation. the cpu must ensure that the svmstd3xor_sync or svmstd3xor_res channels are initialized after the initialization of the svmstd3xor_r and svmstd3xor_t channels: ? assign a priority to the svmstd3xor_r and svmstd3xor_t channels to enable their initialization ? if a synchronization signal or a resolver reference signal channel is used, wait until the hsr bits are cleared to indicate that initialization of the svmstd3xor_r and svmstd3xor_t channels has completed and ? assign a priority to the svmstd3xor_sync or svmstd3xor_res channels to enable their initialization note: a cpu routine that configures the tpu can be generated automatically using the mpc500_quick_start graphical configuration tool. detailed functi on description standard space vector modulation ? 3 outputs version ? xor version ? r channels (svmstd3xor_r) and standard space vector modulation ? 3 outputs version ? xor version ? t channels (svmstd3xor_t) the svmstd3xor_r and svmstd3xor_t tpu functions work together to generate 3 pairs of xor gate inputs. the xor gate outputs then produce a 3- channel 3-phase center-aligned pwm signal. unlike the svmstd, the generated signals are not top-bottom pairs with dead-times but only top-like signals without dead-times. in order to charge the bootstrap transistors, the pwm signals start to run 1.6ms after their initialization (at 20mhz tcr1 clock). the functions generate signals corresponding to reference voltage vector amplitude of 0 (50% duty-cycle) until the first reloaded values are processed. the cpu controls the pwm output by setting the tpu parameters. the stator reference voltage vector components u and u a have to be adjusted during run time. the pwm period t and the prescaler ? the number of pwm periods per reload of new values ? are also read at each reload, so these parameters can be changed during run time. the cpu notifies the tpu that the new reload f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 5 values are prepared by setting the ld_ok parameter. the tpu notifies the cpu that the reload values have been read and new values can be written by clearing the ld_ok parameter. the tpu writes the parameter sector that indicates the current stator reference voltage vector position in sector 1 to 6. the following figures show the input stator reference voltage vector components u and u a , corresponding sectors and output pwm signal duty cycle ratios: figure 2. standard space vector modulation technique the following equations describe how the space vector modulation pwm signal high-times ht a , ht b , ht c and transition times t trans of each channel are calculated: 0 60 120 180 240 300 360 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 phase a phase b phase c 0 60 120 180 240 300 360 -1 -0.5 0 0.5 1 components of the stator reference voltage vector standard space vector modulation technique alpha beta angle angle duty cycle ratios amplitude sector 1 sector 2 sector 3 sector 4 sector 5 sector 6 0 60 120 180 240 300 360 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 phase a phase b phase c 0 60 120 180 240 300 360 -1 -0.5 0 0.5 1 components of the stator reference voltage vector standard space vector modulation technique alpha beta angle angle duty cycle ratios amplitude 0 60 120 180 240 300 360 0 60 120 180 240 300 360 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 phase a phase b phase c phase a phase b phase c 0 60 120 180 240 300 360 0 60 120 180 240 300 360 -1 -0.5 0 0.5 1 -1 -0.5 0 0.5 1 components of the stator reference voltage vector standard space vector modulation technique alpha beta angle angle duty cycle ratios amplitude sector 1 sector 2 sector 3 sector 4 sector 5 sector 6 sector 1 sector 2 sector 3 sector 4 sector 5 sector 6 u t u ? = u t u = f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 6 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola u = x 2 3 y u u + = 2 3 z u u ? = sector: v. iv. iii. vi. i. ii. f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 7 host interface table 4. svmstd3xor_t control bits name options channel function select svmstd3xor_t function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? not used 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable x ? not used channel interrupt status x ? not used table 5. svmstd3xor_r control bits name options channel function select svmstd3xor_r function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? stop written by cpu written by tpu written by both cpu and tpu not used 32 1 0 1 0 1 0 1 0 0 0 32 1 0 1 0 1 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 8 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola tpu function svmstd3xor_r generates an interrupt when the current values of ualfa , ubeta , t and prescaler have been read by tpu and indicates to the cpu that it can write new variables. the cpu program can either wait for this interrupt to occur, or poll the ld_ok bit to check it has cleared. the interrupt is generated at each reload by one of the r channels. the t channels do not generate any interrupts. host sequence bits (hsq) xx ? not used channel interrupt enable 0 ? channel interrupt disabled 1 ? channel interrupt enabled channel interrupt status 0 ? interrupt not asserted 1 ? interrupt asserted table 6. svmstd3xor_t and svmstd3xor_r parameter ram channel parameter1514131211109876543210 phase a 1 channel 0 hta 1 x2_chan_a 2 x1a_chan_a 3 x1b_chan_a 4 ualfa 5 ubeta 6 7 fault_pinstate phase a 2 channel 0 ttime_a2 1 t_copy 2 prsc_copy 3 ua 4 ld_ok 5 sector 6 7 table 5. svmstd3xor_r control bits name options 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 9 phase b 1 channel 0 htb 1 x2_chan_b 2 x1a_chan_b 3 x1b_chan_b 4 t 5 prescaler 6 7 phase b 2 channel 0 ttime_b2 1 dec 2 ua3 3 ub 4 sqrt3 5 sync_presc_addr 6 7 phase c 1 channel 0 htc 1 x2_chan_c 2 x1a_chan_c 3 x1b_chan_c 4 cpu14 5 6 7 phase c 2 channel 0 ttime_c2 1 state 2 center_time 3 4 5 6 7 table 7. svmstd3xor_t and svmstd3xor_r parameter description parameter format description parameters written by cpu ualfa, ubeta 16-bit fractional stator reference voltage vector components t 16-bit unsigned integer pwm period in number of tcr1 tpu cycles prescaler 16-bit unsigned integer the number of pwm periods per reload of new values table 6. svmstd3xor_t and svmstd3xor_r parameter ram channel parameter1514131211109876543210 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 10 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola performance cpu14 16-bit unsigned integer time of 14 imb clocks in tcr1 clocks. sqrt3 16-bit fractional sqrt(3)/2 = 0.866 = $6eda constant sync_presc_addr 8-bit unsigned integer address of synchronization channel prescaler parameter: $x4, where x is synchronization channel number. $0 if no synchronization channel is used. parameters written by both tpu and cpu ld_ok 1-bit 0 ... cpu can update variables 1 ... tpu can read variables cpu sets 1, tpu sets 0 parameters written by tpu sector 16-bit unsigned integer the position of stator reference voltage vector in a sector. the sector can be 1, 2, 3, 4, 5 or 6 fault_pinstate 0 or 1 if fault channel is used, state of fault pin: 0 ... low 1 ... high other parameters are just for tpu function inner use. table 7. svmstd3xor_t and svmstd3xor_r parameter description parameter format description table 8. svmstd3xor_t state statistics state max imb clock cycles ram accesses by tpu st 2 1 sf 2 0 table 9. svmstd3xor_r state statistics state max imb clock cycles ram accesses by tpu init 92 25 stop 82 4 sfr 0 61 sfr 40 14 c5 16 4 sfc 0 61 sfc 56 11 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 11 note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) figure 3. svmstd3xor_t and svmstd3xor_r timing note: the r channel with the momentary earliest transition within the pwm period is marked by a flag1 and runs the sfr and sfc states. c5 c5 center_time center_time t t phase a phase b phase c a1 a2 b1 b2 c1 c2 not a reload period a reload period sfc st sf sfc sfc sfc sfr c5 st st sf sf sfr 0 sfr 0 sfc 0 c5 st sf c5 sf c5 st st sfr flag1 = 1 flag0 = 1 link service request sf f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 12 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola figure 4. svmstd3xor_t state diagram and 3 cases of timing note: which case happens is determined by the time when the link comes. st st sf sf st sf st flag0 = 1 link f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 13 figure 5. svmstd3xor_r state diagram synchronization signal for standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor_sync) the svmstd3xor_sync tpu function uses information obtained from svmstd3xor_r and svmstd3xor_t functions, the actual pwm center times and the pwm periods. this allows a signal to be generated, which tracks the changes in the pwm period and is always synchronized with the pwm. the synchronization signal is a positive pulse generated repeatedly after the prescaler or presc_copy pwm periods (see next paragraph). the low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go a number of tcr1 tpu cycles before or after the pwm period center time. the pulse width pw is another synchronization signal parameter. c5 sfc 0 sfr 0 c5 sfr sfc init hsr = 10 3-times 4 th -time stop hsr = 11 flag1 = 0 flag1 = 1 ? channel with momentary longest high-time f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 14 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola figure 6. synchronization signal adjustment examples synchronized change of pwm prescaler and synchronization signal prescaler the svmstd3xor_sync tpu function actually uses the presc_copy parameter instead of the prescaler parameter. the prescaler parameter holds the prescaler value that is copied to the presc_copy by the svmstd3xor_bottom function at the time the pwm parameters are reloaded. this ensures that new prescaler values for the pwm signals, as well as the synchronization signal, are applied at the same time. write the synchronization signal prescaler parameter address to the sync_presc_addr parameter to enable this mechanism. write 0 to disable it, and remember to set the synchronization signal presc_copy parameter instead of the prescaler parameter in this case. host interface center_time t center_time t center_time t pw |move| m ove < 0 p rescaler = 2 center_time t center_time t center_time t pw |move| m ove > 0 p rescaler = 1 center_time t center_time t center_time t pw |move| m ove < 0 p rescaler = 2 center_time t center_time t center_time t pw |move| m ove > 0 p rescaler = 1 table 10. svmstd3xor_sync control bits name options channel function select svmstd3xor_sync function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority written by cpu written by tpu written by both cpu and tpu not used 32 1 0 1 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 15 tpu function svmstd3xor_sync generates an interrupt after each low to high transition. host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable 0 ? channel interrupt disabled 1 ? channel interrupt enabled channel interrupt status 0 ? interrupt not asserted 1 ? interrupt asserted table 11. svmstd3xor_sync parameter ram channel parameter1514131211109876543210 synchronization channel 0 move 1 pw 2 prescaler 3 presc_copy 4 time 5 dec 6 t_copy 7 table 12. svmstd3xor_sync parameter description parameter format description parameters written by cpu move 16-bit signed integer the number of tcr1 tpu cycles to forego (negative) or come after (positive) the pwm period center time pw 16-bit unsigned integer synchronization pulse width in number of tcr1 tpu cycles. table 10. svmstd3xor_sync control bits name options 1 0 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 16 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola performance there is one limitation. the absolute value of parameter move has to be less than a quarter of the pwm period t . note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) figure 7. svmstd3xor_sync timing prescaler 16-bit unsigned integer the number of pwm periods per synchronization pulse ? use in case of synchronized prescalers change presc_copy 16-bit unsigned integer the number of pwm periods per synchronization pulse ? use in case of asynchronized prescalers change parameters written by tpu other parameters are just for tpu function inner use. table 12. svmstd3xor_sync parameter description parameter format description table 13. svmstd3xor_sync state statistics state max imb clock cycles ram accesses by tpu init 12 5 s1 12 6 s2 8 3 s3 16 7 4 t move < s1 s2 s3 s1 s2 center_time t center_time t center_time t s1 s2 s3 s1 s2 center_time t center_time t center_time t f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 17 figure 8. svmstd3xor_sync state diagram resolver reference signal for standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor_res) the svmstd3xor_res tpu function uses information read from the svmstd3xor_r and svmstd3xor_t functions, the actual pwm center times and the pwm periods. this allows a signal to be generated, which tracks the changes of the pwm period and is always synchronized with the pwm. the resolver reference signal is a 50% duty-cycle signal with a period equal to prescaler or synchronization channel presc_copy pwm periods (see next paragraph). the low to high transition of the pulse can be adjusted by a parameter, either negative or positive, to go a number of tcr1 tpu cycles before or after the pwm period center time. figure 9. resolver reference signal adjustment examples s1 s2 s3 init hsr = 10 s1 s2 s3 init hsr = 10 center_time t center_time t center_time t |move| m ove < 0 p rescaler = 2 center_time t center_time t center_time t |move| m ove > 0 p rescaler = 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 18 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola synchronized change of pwm prescaler and resolver reference signals prescaler the svmstd3xor_res tpu function can inherit the synchronization signal prescaler that is synchronously changed with the pwm prescaler. write the synchronization signals presc_copy parameter address to the presc_addr parameter to enable this mechanism. write 0 to disable it, and in this case set the prescaler parameter to directly specify prescaler value. host interface table 14. svmstd3xor_res control bits name options channel function select svmstd3xor_res function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable x ? not used channel interrupt status x ? not used written by cpu written by tpu written by both cpu and tpu not used 32 1 0 1 0 1 0 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 19 performance there is one limitation. the absolute value of parameter move has to be less than a quarter of the pwm period t . table 15. svmstd3xor_res parameter ram channel parameter1514131211109876543210 resolver 0 move 1 2 presc_addr 3 prescaler 4 time 5 dec 6 t_copy 7 table 16. svmstd3xor_res parameter description parameter format description parameters written by cpu move 16-bit signed integer the number of tcr1 tpu cycles to forego (negative) or come after (positive) the pwm period center time presc_addr 16-bit unsigned integer $00x6, where x is a number of synchronization signal channel, to inherit sync. channel prescaler or $0000 to enable direct specification of prescaler value in prescaler parameter prescaler 1, 2, 4, 6, 8, 10, 12, 14, ... the number of pwm periods per synchronization pulse ? use when apresc_addr = 0 parameters written by tpu other parameters are just for tpu function inner use. 4 t move < f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 20 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks) figure 10. svmstd3xor_res timing figure 11. svmstd3xor_res state diagram fault input for standard space vector modulation ? 3 outputs version ? xor version (svmstd3xor_fault) the svmstd3xor_fault is an input tpu function that monitors the pin, and if a high to low transition occurs, immediately sets all pwm channels low and cancels all further transitions on them. the pwm channels, as well as the synchronization and resolver reference signal channels (if used), have to be initialized again to start them running. table 17. svmstd3xor_res state statistics state max imb clock cycles ram accesses by tpu init 12 5 s1 26 9 s3 18 7 s1 s1 s3 center_time t center_time t center_time t s1 s3 init hsr = 10 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 21 the function returns the actual pinstate as a value of 0 (low) or 1 (high) in the parameter fault_pinstate . the parameter is placed on the a1 channel to keep the fault channel parameter space free. host interface tpu function svmstd3xor_fault generates an interrupt when a high to low transition appears. table 18. svmstd3xor_fault control bits name options channel function select svmstd3xor_fault function number (assigned during assembly the dptram code from library tpu functions) channel priority 00 ? channel disabled 01 ? low priority 10 ? middle priority 11 ? high priority host service bits (hsr) 00 ? no host service request 01 ? not used 10 ? initialization 11 ? not used host sequence bits (hsq) xx ? not used channel interrupt enable 0 ? channel interrupt disabled 1 ? channel interrupt enabled channel interrupt status 0 ? interrupt not asserted 1 ? interrupt asserted written by cpu written by tpu written by both cpu and tpu not used 3 21 0 1 0 1 0 1 0 0 0 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d 22 standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) motorola performance note: execution times do not include the time slot transition time (tst = 10 or 14 imb clocks table 19. svmstd3xor_fault parameter ram channel parameter1514131211109876543210 fault input 0 1 2 3 4 5 6 7 table 20. svmstd3xor_fault parameter description parameter format description parameters written by tpu fault_pinstate 0 or 1 state of fault pin: 0 ... low 1 ... high table 21. svmstd3xor_fault state statistics state max imb clock cycles ram accesses by tpu init 8 2 fault 88 5 no_fault 4 1 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
AN2533/d detailed function description motorola standard svm ? 3 outputs version ? xor version tpu function set (svmstd3xor) 23 ) figure 12. svmstd3xor_fault timing. figure 13. svmstd3xor_fault state diagram fault no_fault fault init hsr = 10 no_fault f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .
how to reach us: usa/europe/locations not listed: motorola literature distribution p.o. box 5405 denver, colorado 80217 1-800-521-6274 or 480-768-2130 japan: motorola japan ltd. sps, technical information center 3-20-1, minami-azabu, minato-ku tokyo 106-8573, japan 81-3-3440-3569 asia/pacific: motorola semiconductors h.k. ltd. silicon harbour centre 2 dai king street tai po industrial estate tai po, n.t., hong kong 852-26668334 home page: http://motorola.com/semiconductors AN2533/d rev. 0 5/2003 information in this document is provided solely to enable system and software implementers to use motorola products. there are no express or implied copyright licenses granted here under to design or fabricate any integrated circuits or integrated circuits based on the information in this document. motorola reserves the right to make changes without further notice to any products herein. motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does motorola assume any liability arising out of the application or use of any produc t or circuit, and specifically disclaims any and all liability , including without limitation consequential or incidental damages. ?typical? parameters that may be provided in motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validat ed for each customer application by customer?s technical experts. motorola does not convey any license under its patent rights nor the rights of others. motorola products are not designed, intended, or authorized for use as components in syst ems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the motorola product cou ld create a situation where personal injury or death may occur. should buyer purchase or use motorola products for any such unintended or unauthorized application, buyer shall indemnify and hold motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that motorola was negligent regarding the design or manufacture of the part. motorola and the stylized m logo are registered in the us patent and trademark office. all other product or service names are the property of their respective owners. motorola, inc. is an equal opportunity/affirmative action employer. ? motorola inc. 2003 f r e e s c a l e s e m i c o n d u c t o r , i freescale semiconductor, inc. f o r m o r e i n f o r m a t i o n o n t h i s p r o d u c t , g o t o : w w w . f r e e s c a l e . c o m n c . . .

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